RSET Events

FPGA based prototyping using Verilog HDL

Organised by: Apptronics   

Aug
30
2024

TO

Aug
31
2024

FPGA based prototyping using Verilog HDL



Event Registeration No : RET/Evnt/2024/12206

Details of the Event

Organised by Apptronics
Description Workshop is intended to give participants a quick start and hands-on practice needed for implementing cutting-edge projects, especially in domains like VLSI, Embedded Systems, Computer Architecture, Communication, DSP, Control and automation Biomedical, etc., targeting FPGA /ASIC.
Type Workshops
Level Department
Need The workshop is an invaluable opportunity for students looking to deepen their knowledge and skills in advanced technical fields, particularly with a focus on FPGA/ASIC development.
Date 30-Aug-2024 to 31-Aug-2024
Place ARC Lab, Main Block, Second floor, 8.30 am - 4.30 pm
BROCHURE
    - Nil -
GEOTAGGED PHOTO
  • - Nil -