RSET Events

Digital System Design using Xilinx ISE

Organised by: Dept ECE   

Mar
26
2021

TO
Mar
27
2021

Digital System Design using Xilinx ISE
Event Registeration No : RET/Evnt/2024/10921
Details of the Event
Organised by Dept ECE
Description Hands on training using Verilog HDL and Hardware Implementation on FPGA
Type Workshops
Level Department
Need Add on Course for S6 ECE students
Date 26-Mar-2021 to 27-Mar-2021
Place Online
BROCHURE
    - Nil -
GEOTAGGED PHOTO
  • - Nil -