Rajagiri Notice

Notice No:  RSET/PL/N/6660                                                Date : 10/10/2022

    

 

Department of Electronics & Communication Engineering

 

Third Semester B.Tech Degree External Lab Examination (Supplementary), October 2022

 

 

 

 

100902/EC322T: LOGIC DESIGN LAB

 

Venue: Logic Design Lab, 2nd Floor, Main Block

 

Date

Time

Register No.

13-10-2022

Thursday

   09:30 a.m. – 12:30 p.m.

 

U2001122, U2001132, U2001133, U2001135, U2001154, U2001099 (6 Nos)

 

 

 

 

 

PRINCIPAL



Principal
Sl No. Date Previous Notices
721 19-Nov-2022 REGISTRATION TO B.TECH S3 (2015 Scheme) SUPPLEMENTARY EXAM DECEMBER 2022
722 18-Nov-2022 Distinguished Lecture
723 18-Nov-2022 La La Code Competition
724 17-Nov-2022 AI & ML Diploma course manuals
725 16-Nov-2022 The winners of the Screening Test conducted by Mathematics Club
726 16-Nov-2022 Bridge course on Data Structures for S3AD & S3 IT Students
727 16-Nov-2022 M.TECH. FIRST SEMESTER (2022 ADMISSIONS) - EXAMINATION CALENDAR
728 15-Nov-2022 The Swearing-in Ceremony and Inauguration of the College Student Council 2022-23
729 15-Nov-2022 DISTINGUISHED LECTURE by Michel Waldschmidt Sorbonne Universite
730 14-Nov-2022 Renewal Application for the MCM Scholarship.
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