Rajagiri Notice

Notice No:  RSET/PL/N/6660                                                Date : 10/10/2022

    

 

Department of Electronics & Communication Engineering

 

Third Semester B.Tech Degree External Lab Examination (Supplementary), October 2022

 

 

 

 

100902/EC322T: LOGIC DESIGN LAB

 

Venue: Logic Design Lab, 2nd Floor, Main Block

 

Date

Time

Register No.

13-10-2022

Thursday

   09:30 a.m. – 12:30 p.m.

 

U2001122, U2001132, U2001133, U2001135, U2001154, U2001099 (6 Nos)

 

 

 

 

 

PRINCIPAL



Principal
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711 29-Nov-2022 B.TECH. DEGREE FIFTH SEMESTER (2020 admission) FIRST INTERNAL EXAMINATION - SCHEDULE
712 28-Nov-2022 Seventh Semester (KTU 2019 Scheme) Second Internal Examination - December 2022
713 28-Nov-2022 Industry Institute Interaction with Tata Consultancy Services
714 25-Nov-2022 Revised schedule of M.Tech. degree third semester (2021 admission) second internal examination
715 24-Nov-2022 International Day for Elimination of Violence against Women
716 23-Nov-2022 PRUEBA- Quiz Competition
717 22-Nov-2022 Online Workshop on The Right way to write an Abstract
718 22-Nov-2022 Poster Competition on Elimination of Violence Against Women
719 21-Nov-2022 Alumni interaction for S5 IT and S5 AD students
720 21-Nov-2022 M.Tech. third semester (2021 admission) - Second Internal Examination Schedule
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