Notice No: RSET/PR/N/3301                                         Date : 11/03/2016
2016
S3 AEI
REMEDIAL CLASS
TIMETABLE
DATE
Time
SUBJECT
STAFF-IN-CHARGE
04.11.16
1.00 pm - 2.00 pm
Network Theory
Ms. Sukanya R Warier
07.11.16
4.35 pm - 5.55 pm
Linear Algebra &
Complex Analysis
Mr. Binu R
08.11.16
4.35 pm - 5.55 pm
Solid Stata Devices
Mr. Anuj Abraham
09.11.16
4.35 pm - 5.55 pm
Electronics Circuits
Mr. Balu Raveendran
10.11.16
4.35 pm - 5.55 pm
Logic Circuit Design
Mr. Hari C.V.
11.11.16
4.35 pm - 5.55 pm
Linear Algebra &
Complex Analysis
Mr. Binu R
14.11.16
4.35 pm - 5.55 pm
Solid Stata Devices
Mr. Anuj Abraham
15.11.16
4.35 pm - 5.55 pm
Electronics Circuits
Mr. Balu Raveendran
16.11.16
4.35 pm - 5.55 pm
Logic Circuit Design
Mr. Hari C.V.
17.11.16
1.00 pm - 1.30 pm
Network Theory
Ms. Sukanya R Warier
17.11.16
4.35 pm - 5.55 pm
Linear Algebra &
Complex Analysis
Mr. Binu R
18.11.16
1.00 pm - 2.00 pm
Network Theory
Ms. Sukanya R Warier
21.11.16
1.00 pm - 1.30 pm
Network Theory
Ms. Sukanya R Warier
22.11.16
4.35 pm - 5.55 pm
Solid Stata Devices
Mr. Anuj Abraham
23.11.16
4.35 pm - 5.55 pm
Electronics Circuits
Mr. Balu Raveendran
24.11.16
4.35 pm - 5.55 pm
Logic Circuit Design
Mr. Hari C.V.
Principal