From Saint Chavara
RSET Unique Id: | 31572 | |
Area of Interest: | VLSI design | |
Website | people.rajagiritech.ac.in/ronyap |
Year | Title of the Paper-Conference/Journal Details |
2023 | Real Time Indoor Mapping Using Hexacopter 9th International Conference on Smart Computing and Communications (ICSCC) 2023 |
2017 | 'Optimized BIST Architecture for Memory Cores and Logic Circuits using CLFSR ',International Conference on Intelligent Computing, Instrumentation and Control Technologies 2017 |
2017 | ;BIST Architecture for Multiple RAMs in SoC',7th International Conference on Advances in Computing and Communications 2017,Rajagiri School of Engineering, Kakkanad |
2017 | 'Optimized Microcode BIST Architecture for Multiple Memory Cores in SoCs',3rd IEEE International Conference on Recent Trends in Electronics, Information and Communication Technology (RTEICT-2018) |
2016 | “Development of TI Console Framework for Test automation of Radio Network Controller”, International Conference on Intelligent Computing and Control Systems (ICICCS), 15 Jun - 16 Jun 2017 |
2015 | Rony Antony P, Anjana Mary," Design and Implementation of Double Precision Floating Point Comparator", Procd. Int.Conf on Global Colloquium in Recent Advancement and Effectual Researches in Engineering, Science and Technology (RAEREST 2016),ELSEVIER, Procedia |
2014 | "Implementation of fast multiplier using modified Radix-4 booth algorithm with redundant binary adder for low energy applications ", IEEE,ICCSC 2014 |
2014 | "VLSI design and comparative analysis of memory BIST controllers",IEEE,ICCSC 2014 |
2013 | “Implementation of Extended Open Core Protocol Interface Memory System using Verilog HDL ”, International Conference On Green Computing , Communication And Conservation of Energy (ICGCE 2013) |